India's semiconductor strategy: the state of play

The bet

India consumes a large and rising volume of semiconductors and, until recently, made almost none of them. The India Semiconductor Mission, launched in 2021 under the Ministry of Electronics and IT, is a state-backed attempt to change that through large capital incentives for fabrication, assembly-test-packaging and design. Its policy parent is the National Policy on Electronics 2019, which named facilitating wafer-fabrication facilities as an explicit state objective. The wager is that India can convert its existing strength — a deep pool of chip design talent already serving global firms — into a presence further up the physical supply chain.

The instrument

The scheme’s decisive change came on 4 October 2022, when the fab scheme was modified to offer a flat 50 per cent of project cost on a pari-passu basis across all process nodes, replacing node-differentiated support. Where that support is given as equity, the Centre’s share is capped at 49 per cent of total project equity. Implementing guidelines followed on 29 May 2023 and the support runs six years; the rulebook was most recently amended on 8 September 2025.

The flat 50 per cent is the single most important number in Indian chip policy. It means the state carries half the capital risk of a facility whose economics are set by yield — a competence no subsidy can supply.

Where it stands: approvals versus operations

As of 7 October 2026, twelve units have been approved under Semicon 1.0, with cumulative investment above Rs 1.64 lakh crore: one silicon fab, one silicon carbide fab, one GaN compound unit and nine assembly, packaging or discrete units, across Gujarat, Assam, Uttar Pradesh, Odisha, Punjab and Andhra Pradesh. The stage-by-stage record for each is kept in the implementation trackers.

What has begun operating is narrower, and the distinction matters more than the headline:

• 28 February 2026 — Micron’s ATMP plant at Sanand was inaugurated, which PIB described as the commencement of commercial production: the first ISM-approved unit to reach that stage.
• 31 March 2026 — Kaynes Semicon, Sanand.
• 4 July 2026 — CG Semi’s OSAT, Sanand.
• 17 September 2026 — commercial lines at CDIL (Mohali) and Suchi Semicon (Surat) were inaugurated; PIB that day counted five ATMP units in commercial operation. Releases on 15 July and 22 September 2026 say three — official counts differ.

Every unit documented as operating is on the packaging and assembly side. The Tata–PSMC silicon fab at Dholera is under construction; the Semicon 2.0 release states its commissioning is scheduled for 2028. Tata’s Jagiroad unit in Assam has reported pilot output on the Assam Chief Minister’s word, not yet confirmed by ISM. Rajasthan’s first semiconductor plant, Sahasra at Bhiwadi (inaugurated 15 May 2026), was built under the separate SPECS components scheme and is not one of the twelve ISM units. ATMP/OSAT is the conventional entry point into the industry, but “assembling and packaging chips” is a materially different claim from “India is making chips,” and the two are routinely conflated.

The design and talent leg

The part of the programme with the least construction risk is the part building on existing strength. Under the Design Linked Incentive scheme, support has gone to 23 companies covering 24 designs across satellite communication, drones, IoT, telecom and AI devices, with free electronic-design-automation tool access for 94 start-ups. The Chips to Start-up programme extended design tools to 397 universities and start-ups; 56 chips designed at more than 46 universities were fabricated at SCL Mohali, and over 67,000 students have been trained.

The wider electronics base it sits on has grown substantially on the ministry’s own figures: manufacturing from Rs 1.9 lakh crore in 2014-15 to Rs 11.32 lakh crore in 2024-25, with exports up from Rs 38,000 crore to Rs 3.26 lakh crore.

The two logics

1. Economic. Capture manufacturing value, build an electronics ecosystem, and cut a large strategic import bill.
2. Strategic autonomy. Chips are a chokepoint in any great-power contest. Domestic capacity, and trusted-partner supply chains, reduce exposure — a calculation sharpened by competition with China and one that ties this programme directly to strategic autonomy.

The next phase: Semicon 2.0

The Union Cabinet approved Semicon 2.0 on 15 July 2026 with an outlay of Rs 1,27,500 crore, against Rs 76,000 crore for the first phase. It was notified in the Gazette on 31 August 2026 in six pillars — design, machines and materials, fabs, ATMP/OSAT, R&D and talent — and guidelines for the machines, fabs and ATMP/OSAT pillars followed on 16 September 2026, opening applications for three years. No project has been approved under it yet; on 17 September the Minister cited about Rs 1 lakh crore of investment commitments, which are not approvals. Reporting by The Indian Express (as relayed by Electronics For You) says the new scheme drops support for technology transfer and leaves land to the states, at lower capital-support rates than Semicon 1.0’s flat 50 per cent; those rates are news-tier and the Semicon 2.0 tracker records them as unestablished until read in the scheme documents. Business Standard frames the phase as a China+1 bet on mature-node chips of 28nm and above.

What still has to be proven

Fabrication is the hard frontier. A modern fab is enormously capital-, water- and power-intensive, depends on imported tooling and process IP, and lives or dies on manufacturing yield — an operational competence built over years, not bought with incentives. Three questions follow, and this brief tracks them rather than answering them:

• Yield at volume. Whether announced fabrication projects reach volume production at competitive yields, as distinct from being commissioned.
• The materials and tooling layer. Analysts have argued the bet needs a materials strategy, not only a manufacturing one — fabs consume specialty chemicals, gases and substrates India largely imports, and tooling access runs through a small number of foreign suppliers.
• Whether partner-dependence is a bridge or a ceiling. The model is built on partnerships with established foreign chipmakers and equipment firms. Carnegie India reads the record favourably — the mission “promised chips, cleanrooms, and committed capital” and delivered, a “build, not buy” lesson it urges on India’s AI effort; whether the partnership structure builds lasting capability or rents it is the contested question.

What is contested

The approval figures, investment totals and commissioning dates above are the government’s own, drawn from ISM notifications, PIB releases and parliamentary replies; the one place official sources disagree is the count of units in commercial production (three or five). What is disputed is what they demonstrate: whether twelve approvals and Rs 1.64 lakh crore of committed investment represent an industry taking root or a pipeline whose hardest stage is still ahead; whether concentrating on packaging first is a sound sequencing or an admission that fabrication is out of reach for now; and whether Semicon 2.0’s reported withdrawal of technology-transfer and land support tightens discipline or deters the partners the model depends on. Those are the positions actually held; this brief attributes them and does not adjudicate.

Who owns this topic (and why we’re here)

Search results for India’s chip programme split between two layers that both miss the same thing. Trade and wire coverage tracks each approval and inauguration as a discrete event, and exam-prep explainers restate the scheme architecture at whatever revision they last saw. Neither keeps a running distinction between what has been approved, what is under construction and what is operating — which is the only distinction that tells you where the programme actually is. That ledger now lives stage by stage in the implementation trackers — each scheme and each approved unit, every stage separately sourced — and the state-level layer in the state semiconductor policy comparison. This brief keeps the analysis, anchored to the semiconductors dossier with the full record.

Maintained topic brief. Analysis by IndiaStand — it characterises the state of play and the range of positions actually held, attributes each claim, and makes no forecast and no recommendation.